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NCV8855
ELECTRICAL CHARACTERISTICS (V IN_SW = V IN = V ISNS1+ = V ISNS1 ? = V ISNS2+ = V ISNS2 ? = 13.2 V, SYS_EN = LDO_EN =
HS_EN = 5 V, VOUT3 = 3.3 V, VOUT4 = 8.5 V, IOUT[1:4] = 0 A) Min/Max values are valid for the temperature range ? 40 ° C v T J v
150 ° C unless noted otherwise. Min/Max values are guaranteed by test, design or statistical correlation.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
SWITCH ? MODE POWER SUPPLY CONTROLLER (SMPS1, VOUT1) SPECIFICATIONS
Error Amplifier
Dc gain
Gain ? bandwidth product
SW_FB1 input bias current
Input offset voltage
(Note 1)
(Note 1)
SW_FB1 = 0.8 V
(Note 1)
70
8
85
10
100
800
dB
MHz
nA
m V
Slew rate
COMP1 source current
COMP1 sink current
C COMP1 = 50 pF, $ 1 mA dc load Slew rate
within ramp voltage levels (Note 1)
V COMP1 = 2.2 V
V COMP1 = 3.2 V
V COMP1 = 2.2 V
V COMP1 = 1.1 V
6
1.5
1.6
1.1
0.7
8
8
8
8
8
V/ m s
mA
mA
mA
mA
Minimum COMP1 voltage
Maximum COMP1 voltage
I COMP1 = 500 m A
I COMP1 = 2 mA
3.3
1.05
V
V
Ramp maximum voltage
Ramp minimum voltage
2.8
1.1
3.0
1.2
3.2
1.3
V
V
Ramp voltage amplitude
V RAMP1
1.6
1.8
2.0
V
Duty Cycle Limitations
Minimum off time
Minimum pulse width
t MINOFF1
t MINON1
GH1 falling to GL1 rising
GH1 rising to GH1 falling
80
120
140
250
200
300
ns
ns
Gate Driver
GH1 source current
GH1 sink current
GL1 source current
GL1 sink current
V GH1 – V SN1 = 4 V, T J = 25 ° C
V GH1 – V SN1 = 2 V, T J = 25 ° C
V GL1 – PGND = 4 V, T J = 25 ° C
V GL1 – PGND = 1 V, T J = 25 ° C
1.5
1.5
1.5
1.5
A
A
A
A
SN1 falling to GL1 rising, non ? overlap
time
GL1 falling to GH1 rising, non ? overlap
time
SN1 falling non ? overlap threshold
voltage
GL1 falling non ? overlap threshold
voltage
SN1 falling override timer
t NOLT
1.0
50
30
30
1.8
2
100
70
70
3.0
150
ns
ns
V
V
ns
SWITCH ? MODE POWER SUPPLY REGULATOR (SMPS2, VOUT2) SPECIFICATIONS
Over Current Protection
Internal current limit
Current limit blanking time
2.5
100
3.05
4.2
200
A
ns
Short circuit threshold voltage
Short circuit protection startup delay
SCTH2
V SW_FB2 % of V REF
From SYS_EN rising edge, % of t SS2,
SW_FB2 = 0.5 V
75
100
85
125
95
150
%
%
1. Guaranteed by design, not fully tested in production.
2. Indirectly guaranteed by test coverage of other parameters.
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